package diffast-langs-verilog-parsing

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diffast-langs-verilog-parsing
- README
- Library diffast-langs-verilog-parsing
  - Verilog_parsing
    
    Ast
    
    Layeredloc
    
    Astloc
    
    Ast_base
    
    Loc
    
    LLoc
    
    L
    
    node
    
    c
    
    Common
    
    Xprint
    
    Parserlib_base
    
    PB
    
    Context
    
    Astloc
    
    Loc
    
    stack
    
    Label
    
    Label_common
    
    XML
    
    Xstring
    
    Labels
    
    OverloadOperator
    
    AssignmentOperator
    
    IncOrDecOperator
    
    UnaryOperator
    
    BinaryOperator
    
    TimingCheck
    
    SystemTask
    
    Qualifier
    
    NetType
    
    PortDirection
    
    Gate
    
    DataType
    
    Expression
    
    EventExpression
    
    PropertyExpression
    
    SequenceExpression
    
    JoinSpec
    
    Statement
    
    CompilerDirective
    
    Strength
    
    SimpleImmediateAssertion
    
    DeferredImmediateAssertion
    
    ConcurrentAssertion
    
    ModuleSpec
    
    AlwaysSpec
    
    BinsSpec
    
    Lib
    
    Storage
    
    Parserlib_base
    
    Astloc
    
    Loc
    
    Aux
    
    PB
    
    C
    
    parser_c
    
    Macro
    
    Macro_base
    
    Loc
    
    table
    
    Parser
    
    Make
    
    MenhirInterpreter
    
    Incremental
    
    Parser_aux
    
    Fname
    
    Env_base
    
    L
    
    env
    
    STATE_T
    
    F
    
    Printer
    
    Scanner
    
    Parserlib_base
    
    Astloc
    
    Loc
    
    Aux
    
    PB
    
    TB
    
    F
    
    TBF
    
    Tokens
    
    Tok
    
    U
    
    Loc
    
    Aux
    
    T
    
    A
    
    buffer_base
    
    buffer
    
    branching_buffer
    
    c
    
    tokensource
    
    U
    
    Loc
    
    Aux
    
    T
    
    A
    
    c
    
    Source
    
    Source_base
    
    c
    
    Token
    
    Parserlib_base
    
    Astloc
    
    Loc
    
    PB
    
    F
    
    Tokenbuffer
    
    Xlist
    
    Xqueue
    
    Xstring
    
    Loc
    
    Aux
    
    L
    
    C
    
    F
    
    Tokens
    
    Tok
    
    U
    
    Loc
    
    Aux
    
    T
    
    A
    
    buffer_base
    
    buffer
    
    branching_buffer
    
    c
    
    tokensource
    
    Tokens
    
    Make
    
    MenhirInterpreter
    
    Tokens_
    
    T
    
    MenhirInterpreter
    
    MenhirInterpreter
    
    Ulexer
    
    Xfile
    
    Astloc
    
    Loc
    
    Ls
    
    F
    
    Loc
    
    Aux
    
    T
- Sources
  - diffast-langs-verilog-parsing
    
    ast.ml
    
    common.ml
    
    context.ml
    
    label.ml
    
    label_common.ml
    
    labels.ml
    
    lib.ml
    
    macro.ml
    
    parser.ml
    
    parser_aux.ml
    
    printer.ml
    
    scanner.ml
    
    source.ml
    
    token.ml
    
    tokenbuffer.ml
    
    tokens.ml
    
    tokens_.ml
    
    ulexer.ml
    
    verilog_parsing.ml

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Module `Verilog_parsing.Ast`Source

module Layeredloc = Langs_common.Layeredloc

module Astloc = Langs_common.Astloc

module Ast_base = Langs_common.Ast_base

module Loc = Astloc

module LLoc = Layeredloc

Sourcemodule L = Label

Sourceclass node : ?lloc:LLoc.c option -> ?children:node list option -> L.t -> object ... end

Source

val get_scope_of_pkg_ctys : 
  < get_identifier : 'a ; label : L.t.. > list ->
  'a option * 'a list

Source

val get_scope_of_func_id : 
  < children : 
    < children : < get_identifier : 'a ; label : L.t.. > list
      ; get_identifier : 'a
      ; label : L.t.. >
      list
    ; label : L.t.. > ->
  'a option * 'a list

Sourceval dummy_node : node

Sourceval empty_node : node

Sourceval lloc_of_locs : Langs_common.Astloc.t -> Langs_common.Astloc.t -> LLoc.c

Sourceval lloc_of_lexposs : Lexing.position -> Lexing.position -> LLoc.c

Sourceval mknode : Lexing.position -> Lexing.position -> L.t -> node list -> node

Sourceval mkleaf : Lexing.position -> Lexing.position -> L.t -> node

Source

val reloc : 
  Lexing.position ->
  Lexing.position ->
  < set_lloc : LLoc.c -> 'a.. > ->
  'a

Sourcetype partial =

| Pdescription_list of node list
| Pmodule_item_list of node list
| Pgenerate_item_list of node list
| Pblock_decl_stmt_list of node list
| Pcase_item_list of node list
| Pcase_inside_item_list of node list
| Pcellpin_list of node list
| Plist_of_ports of node list
| Pexpr of node

Sourceval nodes_of_partial : partial -> node list

Sourceval is_block_item_declaration : < label : L.t.. > -> bool

Sourceval is_stmt : < label : L.t.. > -> bool

Sourceval get_last_id : < get_identifier : string.. > list -> string

Sourceval get_unquoted : string -> string

Sourceval visit : (< children : 'a list.. > as 'a -> 'b) -> 'a -> unit

Sourceval size : < children : 'a list.. > as 'a -> int

Sourceclass c : node -> object ... end

package diffast-langs-verilog-parsing

Module Verilog_parsing.AstSource

Module `Verilog_parsing.Ast`Source