package cil

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type cfgInfo = {
  1. name : string;
  2. start : int;
  3. size : int;
  4. blocks : cfgBlock array;
  5. successors : int list array;
  6. predecessors : int list array;
  7. mutable nrRegs : int;
  8. mutable regToVarinfo : Cil.varinfo array;
}
and cfgBlock = {
  1. bstmt : Cil.stmt;
  2. instrlist : instruction list;
  3. mutable livevars : (reg * int) list;
  4. mutable reachable : bool;
}
and instruction = reg list * reg list
and reg = int
type idomInfo = int array
and dfInfo = int list array
and oneSccInfo = {
  1. nodes : int list;
  2. headers : int list;
  3. backEdges : (int * int) list;
}
and sccInfo = oneSccInfo list
val add_ssa_info : cfgInfo -> unit
val stronglyConnectedComponents : cfgInfo -> bool -> sccInfo
val prune_cfg : cfgInfo -> cfgInfo
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