package hardcaml

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package hardcaml
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Module Std_logic_vector.SopSource

Signed vector operations (ie may operate on Bits.t or Signal.t directly).

Sourceval of_signal : t -> t

Convert to v from a Comb.t.

Sourceval to_signal : t -> t

Convert v to a Comb.t.

Sourceval (+:) : t -> t -> t

Addition. Arguments are extended appropriately and result is 1 bit wider to avoid truntraction.

Sourceval (-:) : t -> t -> t

Subtraction. Arguments are extended appropriately and result is 1 bit wider to avoid truntraction.

Sourceval (*:) : t -> t -> t

Mulitplication.

Comparison operations

. Arguments need not be the same width.

Sourceval (<:) : t -> t -> t
Sourceval (>:) : t -> t -> t
Sourceval (<=:) : t -> t -> t
Sourceval (>=:) : t -> t -> t
Sourceval (==:) : t -> t -> t
Sourceval (<>:) : t -> t -> t
Sourceval resize : t -> Base.int -> t

Resize argument to given width. Appropriate extension is performed.

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