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Source file circuit_utilization.ml
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effects timing and means we tend to print fewer instances. *)moduleMux_map=structtypet=Multiplexer.tMap.M(Int).tletsexp_of_elt(number_of_data_elements,(m:Multiplexer.t))=letmax_instance_bits=m.max_instance_bitsinlettotal_bits=m.total_bitsinletcount=m.countin[%message(number_of_data_elements:int)(max_instance_bits:int)(total_bits:int)(count:int)];;letsexp_of_tt=[%sexp(Map.to_alistt:eltlist)]endtypet={count:int;total_bits:int;multiplexers:Mux_map.t}[@@derivingsexp_of]letnone={count=0;total_bits=0;multiplexers=Map.empty(moduleInt)}letadd?(u=none)s=letnumber_of_data_elements=List.length(Signal.depss)-1inletdata_width=Signal.widthsinletkey=number_of_data_elementsinlettotal_bits=number_of_data_elements*data_widthinSome{count=u.count+1;total_bits=u.total_bits+total_bits;multiplexers=(matchMap.findu.multiplexerskeywith|None->Map.add_exnu.multiplexers~key~data:{max_instance_bits=number_of_data_elements;total_bits;count=1}|Somedata->Map.setu.multiplexers~key~data:{max_instance_bits=maxdata.max_instance_bitstotal_bits;total_bits=data.total_bits+total_bits;count=data.count+1})};;endmoduleMemory=structmoduleT=structtypet={data_width:int;depth:int;total_bits:int}[@@derivingsexp_of,compare]endincludeTincludeComparable.Make(T)endmoduleMemories=structmoduleMem_map=structtypet=intMap.M(Memory).tletsexp_of_elt({Memory.data_width;depth;total_bits},count)=[%message(data_width:int)(depth:int)(total_bits:int)(count:int)];;letsexp_of_tt=[%sexp(Map.to_alistt:eltlist)]endtypet={count:int;total_bits:int;memories:Mem_map.t}[@@derivingsexp_of]letnone={count=0;total_bits=0;memories=Map.empty(moduleMemory)}letadd?(u=none)s=letdata_width=Signal.widthsinletdepth=matchswith|Mem(_,_,_,m)->m.mem_size|Multiport_mem(_,size,_)->size|_->0inlettotal_bits=depth*data_widthinletkey={Memory.data_width;depth;total_bits}inSome{count=u.count+1;total_bits=u.total_bits+key.total_bits;memories=(matchMap.findu.memorieskeywith|None->Map.add_exnu.memories~key~data:1|Somecount->Map.setu.memories~key~data:(count+1))};;endmodulerecInstantiation:sigtypet=|Instantiationofstring|SubmoduleofT.t[@@derivingsexp_of]end=structtypet=|Instantiationofstring|SubmoduleofT.t[@@derivingsexp_of]endandInstantiations:sigtypet=Instantiation.tlist[@@derivingsexp_of]valadd:?u:t->Signal.t->toptionend=structtypet=Instantiation.tlist[@@derivingsexp_of]letnone=[]letadd?(u=none)s=letname=match(s:Signal.t)with|Inst(_,_,inst)->inst.inst_name|_->"<not an instantiation>"inSome(Instantiation.Instantiationname::u);;endandT:sigtypet={name:string;adders:Total_and_max_bits.toption;subtractors:Total_and_max_bits.toption;unsigned_multipliers:Total_and_max_bits.toption;signed_multipliers:Total_and_max_bits.toption;and_gates:Total_bits.toption;or_gates:Total_bits.toption;xor_gates:Total_bits.toption;not_gates:Total_bits.toption;equals:Total_and_max_bits.toption;comparators:Total_and_max_bits.toption;multiplexers:Multiplexers.toption;registers:Total_bits.toption;memories:Memories.toption(* the following do not generate gates. *);constants:Total_bits.toption;wires:Total_bits.toption;concatenation:Total_bits.toption;part_selects:Total_bits.toption(* (recursive) sub modules. *);instantiations:Instantiations.toption}[@@derivingsexp_of]end=structtypet={name:string;adders:Total_and_max_bits.toption[@sexp.option];subtractors:Total_and_max_bits.toption[@sexp.option];unsigned_multipliers:Total_and_max_bits.toption[@sexp.option];signed_multipliers:Total_and_max_bits.toption[@sexp.option];and_gates:Total_bits.toption[@sexp.option];or_gates:Total_bits.toption[@sexp.option];xor_gates:Total_bits.toption[@sexp.option];not_gates:Total_bits.toption[@sexp.option];equals:Total_and_max_bits.toption[@sexp.option];comparators:Total_and_max_bits.toption[@sexp.option];multiplexers:Multiplexers.toption[@sexp.option];registers:Total_bits.toption[@sexp.option];memories:Memories.toption[@sexp.option];constants:Total_bits.toption[@sexp.option];wires:Total_bits.toption[@sexp.option];concatenation:Total_bits.toption[@sexp.option];part_selects:Total_bits.toption[@sexp.option];instantiations:Instantiations.toption[@sexp.option]}[@@derivingsexp_of]endtypet=T.t[@@derivingsexp_of]letreccreate?databasecircuit=letexpand_submodulest=matchdatabasewith|None->t|Somedatabase->{twithT.instantiations=Option.mapt.T.instantiations~f:(funinstantiations->List.mapinstantiations~f:(function|Instantiation.Instantiationnameasinst->(matchCircuit_database.finddatabase~mangled_name:namewith|None->inst|Somecircuit->Instantiation.Submodule(create~databasecircuit))|Instantiation.Submodule_asx->x))}inSignal_graph.fold(Circuit.signal_graphcircuit)~init:{T.name=Circuit.namecircuit;constants=None;adders=None;subtractors=None;unsigned_multipliers=None;signed_multipliers=None;and_gates=None;or_gates=None;xor_gates=None;not_gates=None;equals=None;comparators=None;concatenation=None;multiplexers=None;part_selects=None;wires=None;registers=None;memories=None;instantiations=None}~f:(funutilizationsignal->match(signal:Signal.t)with|Empty->utilization|Const_->{utilizationwithconstants=Total_bits.add?u:utilization.constantssignal}|Wire_->{utilizationwithwires=Total_bits.add?u:utilization.wiressignal}|Select_->{utilizationwithpart_selects=Total_bits.add?u:utilization.part_selectssignal}|Reg_->{utilizationwithregisters=Total_bits.add?u:utilization.registerssignal}|Mem_|Multiport_mem_->{utilizationwithmemories=Memories.add?u:utilization.memoriessignal}|Mem_read_port_->utilization|Inst_->{utilizationwithinstantiations=Instantiations.add?u:utilization.instantiationssignal}|Op(_,op)->(match(op:Signal.signal_op)with|Signal_add->{utilizationwithadders=Total_and_max_bits.add?u:utilization.adderssignal}|Signal_sub->{utilizationwithsubtractors=Total_and_max_bits.add?u:utilization.subtractorssignal}|Signal_mulu->{utilizationwithunsigned_multipliers=Total_and_max_bits.add?u:utilization.unsigned_multiplierssignal}|Signal_muls->{utilizationwithsigned_multipliers=Total_and_max_bits.add?u:utilization.signed_multiplierssignal}|Signal_and->{utilizationwithand_gates=Total_bits.add?u:utilization.and_gatessignal}|Signal_or->{utilizationwithor_gates=Total_bits.add?u:utilization.or_gatessignal}|Signal_xor->{utilizationwithxor_gates=Total_bits.add?u:utilization.xor_gatessignal}|Signal_not->{utilizationwithnot_gates=Total_bits.add?u:utilization.not_gatessignal}|Signal_eq->{utilizationwithequals=Total_and_max_bits.add?u:utilization.equalssignal}|Signal_lt->{utilizationwithcomparators=Total_and_max_bits.add?u:utilization.comparatorssignal}|Signal_cat->{utilizationwithconcatenation=Total_bits.add?u:utilization.concatenationsignal}|Signal_mux->{utilizationwithmultiplexers=Multiplexers.add?u:utilization.multiplexerssignal}))|>expand_submodules;;