package binsec

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Abstract description of machines

Abstract representation of hardware architecture

type bitwidth = [
  1. | `x16
  2. | `x32
  3. | `x64
  4. | `x128
]
type endianness =
  1. | LittleEndian
  2. | BigEndian
type isa = private
  1. | Unknown
  2. | ARM of {
    1. rev : [ `v7 | `v8 ];
    2. endianness : endianness;
    }
  3. | RISCV of {
    1. bits : [ `x32 | `x64 | `x128 ];
    }
  4. | X86 of {
    1. bits : [ `x16 | `x32 | `x64 ];
    }
  5. | Z80
module ISA : sig ... end
module Bitwidth : sig ... end

Word size of the machine in bits

module Endianness : Sigs.PRINTABLE with type t = endianness
type t = isa
val amd64 : t
val armv7 : endianness -> t
val armv8 : endianness -> t
val riscv : [ `x32 | `x64 | `x128 ] -> t
val x86 : t
val z80 : t
val unknown : t
include Sigs.PRINTABLE with type t := t
val pp : Stdlib.Format.formatter -> t -> unit
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