package diffast-langs-verilog
Verilog parser plugin for Diff/AST
Install
Dune Dependency
Authors
Maintainers
Sources
v0.2.tar.gz
sha256=b5bc3e9ed7c92912e06be663c904b6d8c7d277828b6442e43d57c64414d9c5ab
md5=7404586197ede6a4f0a0d00a69069b37
doc/diffast-langs-verilog.base/Verilog_base/V_label/Statement/index.html
Module V_label.Statement
Source
include module type of struct include Ls.Statement end
Source
type t = Verilog_parsing.Labels.Statement.t =
| Empty
| OperatorAssignment of Verilog_parsing.Labels.AssignmentOperator.t
| Labeled of Verilog_parsing.Common.identifier
| BlockingAssignment
| NonBlockingAssignment
| Assign
| Deassign
| Force
| Release
| Case
| Casex
| Casez
| Conditional
| IncOrDec
| SubroutineCall
| SubroutineCallVoid
| Disable
| DisableFork
| EventTrigger
| EventTriggerNonBlocking
| Forever
| Repeat
| While
| For
| Do
| Foreach
| Return
| Break
| Continue
| ParBlock of Verilog_parsing.Common.identifier * Verilog_parsing.Labels.JoinSpec.t
| ProceduralTimingControl
| SeqBlock of Verilog_parsing.Common.identifier
| Wait
| WaitFork
| WaitOrder
| ProceduralAssertion
| ClockingDrive
| Randsequence of Verilog_parsing.Common.identifier
| Randcase
| ExpectProperty
| Expr of Verilog_parsing.Labels.Expression.t
| PExpr of Verilog_parsing.Labels.PropertyExpression.t
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